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System and method for fault sensitivity analysis of mixed-signal integrated circuit designs

机译:混合信号集成电路设计的故障敏感性分析系统和方法

摘要

An apparatus and method for conducting fault sensitivity analysis of the analog portions of a mixed signal circuit design includes simulating the fault free circuit design, inserting a fault into the analog portion of the circuit design, simulating the circuit design with the fault during a fault interval time period, and determining whether the fault is detectable.
机译:用于对混合信号电路设计的模拟部分进行故障敏感性分析的设备和方法包括:模拟无故障电路设计;将故障插入电路设计的模拟部分;在故障间隔期间利用故障模拟电路设计时间段,并确定故障是否可检测。

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