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Method of designing arrangement of TSV in stacked semiconductor device and designing system for arrangement of TSV in stacked semiconductor device
Method of designing arrangement of TSV in stacked semiconductor device and designing system for arrangement of TSV in stacked semiconductor device
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机译:在堆叠半导体器件中设计TSV的布置的方法和在堆叠半导体器件中用于tsv的布置的设计系统
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摘要
A method of designing arrangement of through silicon vias (TSVs) in a stacked semiconductor device is provided The method includes: determining a plurality of TSV candidate grids representing positions, into which the TSVs are insertable, in each of a plurality of semiconductor dies stacked mutually and included in a stacked semiconductor device; creating a plurality of path graphs representing linkable signal paths for a plurality of signals transmitted through the stacked semiconductor device, respectively, based on the TSV candidate grids; determining initial TSV insertion positions corresponding to shortest signal paths for the signals based on the path graphs; and determining final TSV insertion positions by verifying the initial TSV insertion positions so that a plurality of signal networks corresponding to the shortest signal paths for the signals have routability.
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