Disclosed is a system on chip( SOC) that can randomly access to target data of a video/image stream. The system on chip may comprise: a JPEC decoder for receiving an input stream including a first compressed format available for a sequential access, generating a first data by decoding the input stream, and generating an output stream including a second compressed format available for a random access by encoding the first data; a graphic processing unit (GPU) for receiving the output stream and performing a graphic processing on the output stream; and a central processing unit (CPU). Therefore, the system on chip enables an easy graphic processing, by quickly and repetitively receiving the video/image data stored in a storage unit in a randomly accessible compressed format, when operating the graphic processing.;COPYRIGHT KIPO 2015
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