METHOD AND APPARATUS FOR MEASUREING ON CHIP JITTER TOLERANCE FOR CDR CIRCUITS

摘要

A method and an apparatus for measuring on chip jitter tolerance for evaluating the performance of CDR circuits are suggested. The method comprises the stages of: applying a jitter to a cluck in a CDR circuit; adjusting phase changing speed by preset jitter frequency by adjusting the applied setting value of the jitter and adjusting the size of a phase which changes to the maximum by preset jitter size; and resampling and recovering input data in a phase detector of the CDR circuit into a cluck which contains jitter components.