REDUCED TOPOGRAPHY-RELATED IRREGULARITIES DURING THE PATTERNING OF TWO DIFFERENT STRESS-INDUCING LAYERS IN THE CONTACT LEVEL OF A SEMICONDUCTOR DEVICE

摘要

precision semiconductor devices 200 according to the stress-inducing materials (230 , 240), any etching control or etch stop material may be provided on top of the main transistor device 222 without the surface topography on the field region including polysilicon lines placed to 222, in particular a close distance and thereby It can give an efficient diminish possible. In addition, the additional stress-inducing material 235 may be provided based on the superior surface topography, thereby performance-oriented highly efficient strain in the transistor elements (222P, 222N) - may provide a mechanism for induction. ;