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Peripheral device and parallel bus system

机译:外围设备和并行总线系统

摘要

A peripheral device (1, 2, 3) connectable to a controller (100) via a parallel bus (20) at one of a plurality of bus port positions, comprising: at least two connection ports (10, 11) connected to at least two bus lines (10); 20) can be connected according to a bus-connection-position-specific interconnection, the bus-connection-position-specific interconnection permitting a differentiation of the bus connection positions by the peripheral device on the basis of measurable physical quantities transmitted to the peripheral device via the at least two connection lines; a position information acquiring unit (16) configured to measure the physical quantities transmitted by at least two connection terminals of the peripheral device with at least two bus lines and to determine the terminal position therefrom, wherein the at least two bus lines are also used as communication lines of the serve parallel bus.
机译:可在多个总线端口位置之一处经由并行总线(20)连接至控制器(100)的外围设备(1、2、3),包括:至少两个连接至至少一个的连接端口(10、11)两条公交线路(10); 20)可以根据特定于总线连接位置的互连进行连接,该特定总线连接位置的互连允许外围设备根据传输到外围设备的可测量物理量来区分总线连接位置通过至少两条连接线;位置信息获取单元(16),用于测量所述外围设备的至少两个连接端子与至少两条总线之间传输的物理量,并从中确定端子位置,其中,所述至少两条总线也用作服务并行总线的通信线路。

著录项

  • 公开/公告号DE112010005993B4

    专利类型

  • 公开/公告日2015-07-30

    原文格式PDF

  • 申请/专利权人 MITSUBISHI ELECTRIC CORP.;

    申请/专利号DE20101105993T

  • 发明设计人 TOSHIYUKI YAMASHITA;YUJI HIRAOKA;

    申请日2010-11-11

  • 分类号G06F13/14;G06F13/40;

  • 国家 DE

  • 入库时间 2022-08-21 14:55:54

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