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A method and structure for increasing the performance, and of the reduction in the nbti (negative bias temperature inst ability) of a mosfet
A method and structure for increasing the performance, and of the reduction in the nbti (negative bias temperature inst ability) of a mosfet
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机译:一种用于提高性能,降低MOSFET的nbti(负温度插入能力)的方法和结构
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摘要
A method for forming a field effect transistor structure (100) of the p - type (pfet), said method comprising:The formation of a mask layer (118) on a semiconductor substrate (110), wherein the mask layer (118) an opening (120) having a semiconductor region (114a) of the semiconductor substrate (110) within the opening (120) exposes;Forming a n - type - trough (n - trough) (122) in the semiconductor region (114a) by applying an ion implantation of n - - dopant type to the semiconductor substrate (110) through the opening (120) of the mask layer (118); andApplying a germanium (ge) - channel implantation to the semiconductor substrate (110) through the opening (120) of the mask layer (118), as a result of which a ge - channel implantation region (124) in the n - trough (122) is formed.
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