首页> 外国专利> A method for managing of the flash - storing with mixed types of storage devices with the use of a finely - granulated allocation logic to physical memory addresses

A method for managing of the flash - storing with mixed types of storage devices with the use of a finely - granulated allocation logic to physical memory addresses

机译:一种用于管理闪存的方法,该方法使用对物理内存地址的细化分配逻辑,使用混合类型的存储设备进行存储

摘要

The invention relates to a method for managing a is (fls) for a computer system (cs) with a plurality of flash chips (fc), which in a plurality of separately erasable physical memory blocks are divided, and this memory blocks have a limited maximum erase frequency, and the memory blocks are divided into writable pages, which in turn are subdivided in addressable subpages, and the subpages of a computer system via logical sector addresses (lba), which by means of an address conversion structure in physical subpageadressen (pba) are reacted,wherein, in the flash memory two regions with different types of the flash chips are present, and the first region (bl) single - level - flash chips slc with a very high maximum erase frequency and the second region (b2) multi - level - flash chips mlc with a lower maximum erase frequency and for each storage block contains the number of the performed deletions in a counter (ec) is counted, and is in the process of writing to the address translation table of the logic sector addresses (lba) in physical subpageadressen (pba) is effected such that the sectors in subpages of the memory blocks of the first region (bl) are described, and wherein when so many write operation in the first region (b1) have taken place, that now an upper threshold value (sS, o) for a degree of filling (fS) on written memory blocks in the first region (b1) is reached, in the course of a garbage collection in the first region (b1) is a written memory block with a low counter is sought, the valid subpages in a memory block of the second region (b2) are transmitted, the address assignments for the transmitted subpages be updated, and the memory block of the first region is erased and as a buffer block is made available for further writing operations
机译:本发明涉及一种用于管理具有多个闪存芯片(fc)的计算机系统(cs)的存储设备(fls)的方法,所述闪存芯片在多个可单独擦除的物理存储块中被划分,并且该存储块具有有限的容量。最大擦除频率,然后将存储块分为可写页面和可写页面,再将其细分为可寻址子页面,再通过逻辑扇区地址(lba)来划分计算机系统的子页面,逻辑扇区地址通过物理子页面地址中的地址转换结构( (pba)反应,其中,在闪存中存在两个具有不同类型闪存芯片的区域,第一区域(b1)具有很高的最大擦除频率的单级闪存芯片slc和第二区域(b2 )多级闪存芯片mlc,其最大擦除频率较低,并且每个存储块都包含在计数器(ec)中执行的删除次数,并且正在写入地址转换t实现物理子页面地址(pba)中的逻辑扇区地址(lba)的能,使得描述了第一区域(b1)的存储块的子页面中的扇区,并且其中当在第一区域(b1)中有如此多的写操作时),现在在第一个区域(b1)中已写存储块的填充程度(f S )的上限阈值(s S,o ) )达到,在第一个区域(b1)的垃圾回收过程中,正在寻找具有低计数器的已写存储块,传输第二个区域(b2)的存储块中的有效子页面,地址分配用于传输的子页面的更新,并且擦除第一区域的存储块,并且作为缓冲块可用于进一步的写操作

著录项

  • 公开/公告号DE102014101185A1

    专利类型

  • 公开/公告日2015-08-06

    原文格式PDF

  • 申请/专利权人 HYPERSTONE GMBH;

    申请/专利号DE201410101185

  • 发明设计人 FRANZ SCHMIDBERGER;

    申请日2014-01-31

  • 分类号G06F12/02;G06F12/06;G06F12/10;

  • 国家 DE

  • 入库时间 2022-08-21 14:55:13

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