New instructions and highly efficient and micro-architecture that allows for context switching immediate for user-level threading

摘要

The processor, using a plurality of banks of the extended register set to store multiple contexts of the plurality of user-level threads. Current bank register provides a pointer to the currently active bank. The first thread is its own context (the first context), it is stored in the first bank of the extended register set, the second thread is its own context (second context), is stored in the second bank of the extended register set. Processor, when receiving a command for exchanging a plurality of contexts between the first thread and the second thread, the processor, the first bank to the second bank is allowed to change the pointer, stored in the second bank performing a second thread with a second context is.