A NEW INSTRUCTION AND HIGHLY EFFICIENT MICRO-ARCHITECTURE TO ENABLE INSTANT CONTEXT SWITCH FOR USER-LEVEL THREADING

摘要

Processor is set as storing multiple user-level threads using the context of more extension buffers. It is currently valid that current bank, which provides toward industry book and is directed toward library,. The context (first) that first thread context saves it saves its context (the second context) in the second memory bank extended register collection in the second thread of the first memory bank extended register collection. When processor receives the first screw thread and the second screw thread of exchange context between instruction, the processor changes from first row and secondary series main points, and executes the second thread and be stored in the second memory bank using the second context.