Methods of Forming Field Effect Transistors Having Silicon-Germanium Source/Drain Regions Therein

摘要

Methods of forming field effect transistors include selectively etching source and drain region trenches into a semiconductor region using a gate electrode as an etching mask. An epitaxial growth process is performed to fill the source and drain region trenches. Silicon germanium (SiGe) source and drain regions may be formed using an epitaxial growth process. During this growth process the bottoms and sidewalls of the trenches may be used as “seeds” for the silicon germanium growth. An epitaxial growth step may then be performed to define silicon capping layers on the SiGe source and drain regions.