Memory controller and integrated circuit device for correcting errors in data read from memory cells

摘要

An integrated circuit device for correcting errors in data read from memory cells includes a decoder, an encoder and a data management module. The data management module is configured to select a correctable raw bit error rate limit from a plurality of raw bit error rate limits by changing a code-rate used by the encoder, wherein a virtual change to the decoder and the encoder occur to change the code rate.