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Semiconductor devices with structures for suppression of parasitic bipolar effect in stacked nanosheet FETs and methods of fabricating the same
Semiconductor devices with structures for suppression of parasitic bipolar effect in stacked nanosheet FETs and methods of fabricating the same
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机译:具有用于抑制堆叠的纳米片FET中的寄生双极效应的结构的半导体器件及其制造方法
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摘要
A device may include a nanosheet field effect transistor (FET) that may include a substrate, a well that is doped with impurities at a surface of the substrate, a channel including a plurality of stacked nanosheets, a gate, a conductive material, and an isolation layer. Ones of the plurality of stacked nanosheets may include a semiconductor material that may be doped with impurities of the same conductivity type as the impurities of the well. The conductive material may be adjacent the plurality of nanosheets and may electrically connect ones of the plurality of nanosheets to the well. The isolation layer may electrically insulate the well from the workfunction metal.
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