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Die stacking techniques in BGA memory package for small footprint CPU and memory motherboard design
Die stacking techniques in BGA memory package for small footprint CPU and memory motherboard design
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机译:BGA存储器封装中的管芯堆叠技术,用于小尺寸CPU和存储器母板设计
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摘要
A microelectronic package can include a substrate comprising a dielectric element having first and second opposite surfaces, and a microelectronic element having a face extending parallel to the first surface. The substrate can also include a plurality of peripheral edges extending between the first and second surfaces defining a generally rectangular or square periphery of the substrate. The substrate can further include a plurality of contacts and terminals, the contacts being at the first surface, the terminals being at at least one of the first or second surfaces. The microelectronic elements can have a plurality of edges bounding the face, and a plurality of element contacts at the face electrically coupled with the terminals through the contacts of the substrate. Each edge of the microelectronic element can be oriented at an oblique angle with respect to the peripheral edges of the substrate.
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