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Die stacking techniques in BGA memory package for small footprint CPU and memory motherboard design

机译:BGA存储器封装中的管芯堆叠技术,用于小尺寸CPU和存储器母板设计

摘要

A microelectronic package can include a substrate comprising a dielectric element having first and second opposite surfaces, and a microelectronic element having a face extending parallel to the first surface. The substrate can also include a plurality of peripheral edges extending between the first and second surfaces defining a generally rectangular or square periphery of the substrate. The substrate can further include a plurality of contacts and terminals, the contacts being at the first surface, the terminals being at at least one of the first or second surfaces. The microelectronic elements can have a plurality of edges bounding the face, and a plurality of element contacts at the face electrically coupled with the terminals through the contacts of the substrate. Each edge of the microelectronic element can be oriented at an oblique angle with respect to the peripheral edges of the substrate.
机译:微电子封装可以包括衬底,该衬底包括具有第一和第二相对表面的介电元件,以及具有平行于第一表面延伸的面的微电子元件。基板还可包括在第一表面和第二表面之间延伸的多个外围边缘,其限定了基板的大致矩形或正方形外围。基板可以进一步包括多个接触件和端子,接触件在第一表面上,端子是第一或第二表面中的至少一个。所述微电子元件可具有界定所述表面的多个边缘,以及在所述表面处的多个元件触点,所述多个元件触点通过所述基板的触点与所述端子电耦合。微电子元件的每个边缘可以相对于衬底的外围边缘以倾斜角定向。

著录项

  • 公开/公告号US9281296B2

    专利类型

  • 公开/公告日2016-03-08

    原文格式PDF

  • 申请/专利权人 INVENSAS CORPORATION;

    申请/专利号US201414448040

  • 发明设计人 ZHUOWEN SUN;YONG CHEN;KYONG-MO BANG;

    申请日2014-07-31

  • 分类号H01L25;H01L25/065;H01L23/498;H01L23;

  • 国家 US

  • 入库时间 2022-08-21 14:27:51

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