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IMPROVED CLADDING LAYER EPITAXY VIA TEMPLATE ENGINEERING FOR HETEROGENEOUS INTEGRATION ON SILICON

机译:通过模板工程改进的包覆层表观外延,可实现硅的异质结合

摘要

A semiconductor body-semiconductor body comprising junction regions disposed on opposite sides of a channel region and a channel region, the semiconductor body-semiconductor body comprising: a first material comprising a first band gap; And a second material comprising a second material having a second bandgap different from the first bandgap, the plurality of nanowires comprising a plurality of nanowires, the plurality of nanowires comprising a first material, Disposed in planes that have been removed; And a gate stack disposed over the channel region. Forming a plurality of nanowires in a separate plane on the substrate, each of the plurality of nanowires including a material comprising a first band gap; Separately forming a cladding material around each of the plurality of nanowires, the cladding material including a second band gap; Joining the cladding material; And disposing a gate stack on the cladding material.
机译:一种半导体本体-半导体本体,包括设置在沟道区和沟道区的相对侧上的结区,该半导体本体-半导体本体包括:第一材料,其包括第一带隙;以及第二材料,其包括第一带隙。以及第二材料,其包括第二材料,所述第二材料具有与所述第一带隙不同的第二带隙,所述多个纳米线包括多个纳米线,所述多个纳米线包括第一材料,并布置在已去除的平面中;栅堆叠设置在沟道区上方。在衬底上的单独平面中形成多条纳米线,每条纳米线包括具有第一带隙的材料;围绕所述多个纳米线的每一个分别形成包层材料,所述包层材料包括第二带隙;连接覆层材料;并将栅极叠层布置在覆层材料上。

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