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Different threshold value voltage is a position in pmos - transistors by means of different production of a channel half conductor material

机译:不同阈值电压是通过不同方式生产沟道半导体材料在pmos-晶体管中的位置

摘要

A method with:Forming a threshold value voltage of an adjusting ends semiconductor alloy on a first semiconductor region, while a second semiconductor region is masked, wherein the forming threshold value voltage of an adjusting ends semiconductor alloy form of a silicon - and germanium semiconductor material containing comprises;Forming a first gate electrodes structure of a first p - channel transistor with a first gate length by means of the first semiconductor region, the end of an adjusting the threshold value voltage has semiconductor alloy;Forming a second gate electrodes structure of a second p - channel transistor with a second gate length which is smaller than the first gate length, on the second semiconductor region, wherein the first and second gate electrodes structure a dielectric material with a large ε, wherein the second gate length 50 nm or less;Performing a pans implantation sequence in such a way that the maximum when endo animal substance concentration before forming the first and second gate electrodes structure is adjusted;Forming a first drain - and said source region in the first semiconductor region; andForming a second drain - and said source region in the second semiconductor region, wherein the first and second drain - and source regions have the same conductivity type.
机译:一种方法,在第一半导体区域上形成调节端半导体合金的阈值电压,同时遮蔽第二半导体区域,其中,调节端半导体合金的形成阈值电压由硅和锗半导体材料形成通过第一半导体区域形成具有第一栅极长度的第一p沟道晶体管的第一栅电极结构,调节阈值电压的端部具有半导体合金;在第二半导体区域上具有小于第一栅极长度的第二栅极长度的第二p沟道晶体管,其中第一栅极电极和第二栅极电极构成具有大ε的介电材料,其中第二栅极长度为50nm或更小;以这样的方式执行锅植入程序,即在动物内体形成前的最大浓度时调节第一栅电极结构和第二栅电极结构;在第一半导体区域中形成第一漏极和所述源极区域;在第二半导体区域中形成第二漏极和所述源极区域,其中第一和第二漏极和源极区域具有相同的导电类型。

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