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Small multiplier after initial approximation for operations with increasing precision

机译:初始近似后的较小乘数,用于提高精度的运算

摘要

An apparatus comprises an initial approximation circuit (e.g. Look-Up Table) for providing an initial approximation of an output value; a limited-precision multiplier circuit, which receives the initial approximation circuit and multiplies it with another value; and a full-precision multiplier circuit, which receives an output from the limited-precision circuit, and multiplies it with another value. The number of cycles taken to perform the full-precision multiplication is greater than or equal to the time taken to perform both the initial approximation and the limited-precision multiplication. The full-precision multiplier circuitry preferable performs a double-precision multiplication between two mantissas. The apparatus preferably provides a value for a dividend by a divisor; and the initial approximation is a reciprocal of the divisor. The apparatus may provide a value for a square root, with the initial approximation being of a reciprocal of the square root. The invention is intended for use in an iterative refinement approach (e.g. Newton-Raphson).
机译:一种设备,包括初始近似电路(例如,查找表),用于提供输出值的初始近似;以及有限精度乘法器电路,该电路接收初始近似电路并将其与另一个值相乘;一个全精度乘法器电路,它接收来自限精度电路的输出,并将其与另一个值相乘。执行全精度乘法所需的周期数大于或等于执行初始逼近和有限精度乘法所需的时间。全精度乘法器电路最好在两个尾数之间执行双精度乘法。该设备优选地提供除数的除法值;初始近似值是除数的倒数。该设备可以提供平方根的值,初始近似是平方根的倒数。本发明旨在用于迭代改进方法(例如,Newton-Raphson)。

著录项

  • 公开/公告号GB2532332A

    专利类型

  • 公开/公告日2016-05-18

    原文格式PDF

  • 申请/专利权人 IMAGINATION TECHNOLOGIES LIMITED;

    申请/专利号GB20150017020

  • 发明设计人 LEONARD RARICK;

    申请日2015-09-25

  • 分类号G06F7/487;G06F7/535;G06F7/552;

  • 国家 GB

  • 入库时间 2022-08-21 14:07:46

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