Design and operation of a pulse-number multiplier for a high-precision RSFQ D/A converter

摘要

A pulse-number multiplier (PNM) is a principal subsystem of our rapid single flux quantum digital-to-analog converter for metrology applications. The PNM circuit generates a high-speed pulse train from an input of a precise low-frequency clock signal. We designed, fabricated, and successfully tested a PNM test circuit. The PNM test circuit was implemented by using our standard cell library on 1.6 kA/cm/sup 2/ Nb trilayer technology. Fully functional operation was confirmed by low-speed testing. Experimental bias margins were wider than /spl plusmn/20%, and these results agreed with a simulation. We also tested the circuit by average-voltage measurements for estimating the frequencies of output pulse trains. Results of average-voltage measurements implied that the output frequency of the PNM circuit was tunable from 5 GHz to 17 GHz. The bit error rate (BER) of the PNM circuit was measured, and extrapolation of the error-function fits suggested a sufficiently small BER at the optimum bias point.