Cache coherent NOC (Network on Chip) with a variable number of cores, input / output (I / O) devices, directory structure and coherency points

摘要

It is targeted to design NoC interconnection structure by specification. This NoC interconnection structure can indicate implementation parameters including, but not limited to, the number of NoC agent interfaces and the number of cache coherency controllers. The flexible identifiers of the NoC agent interface and cache coherency controller allow any number of agents to be associated with NoC when constructing NoC from specifications.(FIG.