According to one embodiment, a memory system includes a memory, an error correcting circuit and a memory controller. The memory includes a memory cell which is writable in a memory mode including a first mode and a second mode. The first mode is a mode in which a value of bits is written to the memory cell. The second mode is a mode in which a value of bits smaller than that in the first mode is written to the memory cell. The memory controller controls a coding rate for the error correction on the basis of result of error correction. The controller sets the first mode as the memory mode to be used. The controller changes the memory mode to be used from the first mode to the second mode in a case where the coding rate is less than a first threshold.
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