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Methods to form multi threshold-voltage dual channel without channel doping

机译:无需沟道掺杂形成多阈值电压双沟道的方法

摘要

Methods to form multi Vt channels, including a single type of WF material, utilizing lower annealing temperatures and the resulting devices are disclosed. Embodiments include providing an interfacial-layer on a semiconductor substrate; forming a first high-k dielectric-layer on the interfacial-layer; forming a second high-k dielectric-layer and a first cap-layer, respectively, on the first high-k dielectric-layer; removing the second high-k dielectric and first cap layers in first and second regions; forming a second cap-layer on the first high-k dielectric-layer in the first and second regions and on the first cap-layer in a third region; performing an annealing process; removing the second cap-layer from all regions and the first cap-layer from the third region; forming a third high-k dielectric-layer over all regions; forming a work-function composition-layer and a barrier-layer on the third high-k dielectric-layer in all regions; removing the barrier-layer from the first region; and forming a gate electrode over all regions.
机译:公开了利用较低的退火温度形成多个V t 通道的方法,包括单一类型的WF材料和所得器件。实施例包括在半导体衬底上提供界面层;在界面层上形成第一高k介电层;在第一高k介电层上分别形成第二高k介电层和第一盖层。在第一和第二区域中去除第二高k电介质和第一盖层;在第一区域和第二区域中的第一高k介电层上以及第三区域中的第一盖层上形成第二覆盖层;执行退火过程;从所有区域去除第二覆盖层,并从第三区域去除第一覆盖层;在所有区域上形成第三高k介电层;在所有区域中的第三高k介电层上形成功函数组成层和势垒层;从第一区域去除阻挡层;并在所有区域上形成栅电极。

著录项

  • 公开/公告号US9735061B1

    专利类型

  • 公开/公告日2017-08-15

    原文格式PDF

  • 申请/专利权人 GLOBALFOUNDRIES INC.;

    申请/专利号US201615014150

  • 申请日2016-02-03

  • 分类号H01L21/44;H01L21/31;H01L21/469;H01L21/8234;H01L21/28;H01L27/088;H01L29/49;H01L29/51;

  • 国家 US

  • 入库时间 2022-08-21 13:46:39

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