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Method of reducing the heights of source-drain sidewall spacers of FinFETs through etching and the FinFETs thereof

机译:通过蚀刻减小FinFET的源极-漏极侧壁间隔物的高度的方法及其FinFET

摘要

An integrated circuit device includes a semiconductor substrate, insulation regions extending into the semiconductor substrate, and a semiconductor fin protruding above the insulation regions. The insulation regions have a first portion and a second portion, with the first portion and the second portion on opposite sides of the semiconductor fin. The semiconductor fin has a first height. The integrated circuit device further includes a gate stack over a middle portion of the semiconductor fin, and a fin spacer on a sidewall of an end portion of the semiconductor fin. The fin spacer has a second height. The first height is greater than about two times the second height.
机译:集成电路装置包括:半导体基板;延伸到半导体基板中的绝缘区域;以及在绝缘区域上方突出的半导体鳍。绝缘区域具有第一部分和第二部分,其中第一部分和第二部分在半导体鳍的相对侧上。半导体鳍具有第一高度。该集成电路器件还包括:在半导体鳍的中间部分上方的栅堆叠;以及在半导体鳍的端部的侧壁上的鳍间隔物。鳍间隔件具有第二高度。第一高度大于第二高度的大约两倍。

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