首页> 外国专利> Wear leveling method based on timestamps and erase counts, memory storage device and memory control circuit unit

Wear leveling method based on timestamps and erase counts, memory storage device and memory control circuit unit

机译:基于时间戳和擦除次数的磨损均衡方法,存储器存储设备和存储器控制电路单元

摘要

A wear leveling method for a rewritable non-volatile memory module is provided. The method includes: recording a timestamp for each of physical erasing units storing valid data according to a programming sequence of the physical erasing units storing valid data among the physical erasing units, and recording an erase count for each of physical erasing units. The method also includes: selecting a first physical erasing unit from the physical erasing units storing valid data according to the timestamps, selecting a second physical erasing unit from physical erasing units not storing valid data among the physical erasing units according to the erase counts, and writing valid data of the first physical erasing unit into the second physical erasing unit, and marking the first physical erasing unit as a physical erasing unit not storing valid data.
机译:提供了一种用于可重写非易失性存储模块的损耗均衡方法。该方法包括:根据物理擦除单元中存储有效数据的物理擦除单元的编程顺序,为存储有效数据的每个物理擦除单元记录时间戳;以及记录每个物理擦除单元的擦除计数。该方法还包括:根据时间戳从存储有效数据的物理擦除单元中选择第一物理擦除单元;根据擦除计数,从物理擦除单元中从不存储有效数据的物理擦除单元中选择第二物理擦除单元;以及将第一物理擦除单元的有效数据写入第二物理擦除单元,并将第一物理擦除单元标记为不存储有效数据的物理擦除单元。

著录项

  • 公开/公告号US9665481B2

    专利类型

  • 公开/公告日2017-05-30

    原文格式PDF

  • 申请/专利权人 PHISON ELECTRONICS CORP.;

    申请/专利号US201514824092

  • 发明设计人 KOK-YONG TAN;

    申请日2015-08-12

  • 分类号G06F13/00;G06F12/02;G11C16/16;G11C16/00;G11C16/34;

  • 国家 US

  • 入库时间 2022-08-21 13:43:21

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