MULTI-PORT SRAM CIRCUIT WITH FIRST AND SECOND WORD LINE

摘要

A multi port hybrid full swing/low swing memory circuit in a static random access memory (SRAM) device comprises a first wordline driver that comprises a read wordline driver a second wordline driver that comprises either a read wordline driver or a read/write wordline driver a memory cell coupled to the first and second wordline drivers a sense amplifier coupled to the memory cell and a latch coupled to the memory cell. The memory circuit is capable of achieving high speed low swing or low speed full swing operations while avoiding the need for a large circuit area on an integrated circuit. Fig.1