DAC R-2R HYBRID R-2R STRUCTURE FOR LOW GLITCH NOISE SEGMENTED DAC

摘要

Device may be an N- bit DAC comprising M pieces associated with the most significant bit (2 ^M -1) than the parallel stages and (NM) associated with one stage (NM) than the least significant bit. (2 ^M -1) than the parallel stages may pass the first current to the current-summing node of the DAC. (NM) stages may pass a second current to the resistive network, and the stage may comprise a second pair of resistive network and the switch. Each resistive network may be scaled according to the binary weight of the stage corresponding to the resistance network, the current passed, respectively, can pass the scaled current to the pair of current summing node. (NM) at least one of the stages can be separated from the rest of the stage. ;