SRAM SRAM CELL AND LOGIC CELL DESIGN

摘要

An embodiment is an integrated circuit structure including a static random access memory (SRAM) cell and a logic cell. The SRAM cell has a first number of semiconductor fins, has a first boundary and a second boundary parallel to each other, has a third boundary and a fourth boundary parallel to each other and has a first cell height measured from the third boundary to the fourth boundary. The logic cell has a first number of semiconductor fins and the first cell height. According to the present invention, a module process development time can be reduced.