SRAM -SRAM BIT-LINE AND WRITE ASSIST APPARATUS AND METHOD FOR LOWERING DYNAMIC POWER AND PEAK CURRENT AND A DUAL INPUT LEVEL-SHIFTER

摘要

An apparatus comprising a plurality of memory arrays coupled together in a group, local write auxiliary logic units, and read / write local column multiplexers are described, wherein the local write auxiliary logic unit in the group and the read / write local column multiplexer occupy Is smaller than the area when the global write auxiliary logic unit and the read / write global thermal multiplexer are used. A dual input level-shifter with integrated latches is described. A write auxiliary pulse generator operating on a first power supply; One or more pullup devices coupled to the write assisting pulse generator and operating on a second power supply different than the first power supply; And an output node that provides power to the memory cell.