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3 -- Metal-Interlayer-Semiconductor Structure on Source/Drain Contact for Low Temperature Fabrication with Monolithic 3D Integration Technology and Manufacturing Method
3 -- Metal-Interlayer-Semiconductor Structure on Source/Drain Contact for Low Temperature Fabrication with Monolithic 3D Integration Technology and Manufacturing Method
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机译:3-用于单片3D集成技术的低温制造的源/漏触点上的金属层间半导体结构和制造方法
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摘要
The present invention, semiconductor layers, including a dielectric layer formed between the forming the source or drain of the semiconductor element metal layer and the metal layer and the semiconductor layer and the dielectric layer on the semiconductor device, the source or drain forming the ALD (Atomic doedoe doped through Layer Deposition) process method, by controlling the doping density of the dielectric layer to control the number of times of the feed cycle of the ALD process, it is possible to provide a semiconductor device that implements the low contact resistance with only low-temperature processes.
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