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METHOD OF IMPROVING CIRCUIT FAULT TOLERANCE AND FAULT TOLERANT CIRCUIT FOR ITS IMPLEMENTATION
METHOD OF IMPROVING CIRCUIT FAULT TOLERANCE AND FAULT TOLERANT CIRCUIT FOR ITS IMPLEMENTATION
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机译:改善电路故障容限的方法及其实现的容错电路
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摘要
FIELD: physics.;SUBSTANCE: method is implemented by connecting unified elements through switches and reconfiguring the circuit in the event of element failure. The method of improving the fault tolerance is as follows. The circuit is decomposed and a number of nodes are selected. Each node consists of unified elements. One or more redundant backup nodes are added to the circuit, which are used, when the main nodes fail. Switchboards are added to the circuit, which ensure interconnections between the elements in the node and the nodes among themselves. The switchboard contains a table for switching inputs and outputs, a device for receiving and transmitting information, a circuit for comparing the output signals. Elements from one or different nodes are grouped together and connected to the switchboards. The switchboards are connected to each other. During the circuit operation, the switchboard controls the operability of the elements. For this purpose the inputs of the main and several backup elements or nodes, the same signals are fed, and the signals are compared at their outputs. If the signals coincide, then all elements or nodes are operable. If the signals do not coincide, then it is determined, which elements or nodes are inoperable. If a circuit element fails, reconfiguration takes place, when a backup element is connected instead of the main element. When reconfiguring, the communication table changes in the switchboard, to which the failed element is connected. With the switchboard disconnects the inefficient elements or nodes, working backup elements or nodes are connected instead of them. Then the serviceability of the elements of the failed node is controlled, and all the serviceable elements are transferred to the reserve. The claimed method is implemented in the device of a fault tolerant circuit. The fault tolerant circuit is developed on the basis of the switchboard architecture and implements a tree structure, where the branches are formed by mutual connections of the switchboards 4, and the leaves are formed by the main and backup elements connected to the switchboards 1,2,3.;EFFECT: increasing the circuit fault tolerance.;2 cl, 4 dwg
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