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Multilayer substrate for connecting a chip to a printed circuit board, chip encapsulation and method
Multilayer substrate for connecting a chip to a printed circuit board, chip encapsulation and method
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机译:用于将芯片连接到印刷电路板的多层基板,芯片封装和方法
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摘要
A multilayer substrate (40) for connecting a chip (22) to a circuit board (10), comprising: - a substrate (40) having a first side (23) with a central attachment site (42) for receiving the chip ; An electrically conductive material disposed on the first side (23) of the substrate (40), the electrically conductive material having a signal interconnect (46) spaced from the die attach site, a signal trace (44) extending up to the interconnect Signal interconnect, forming a plating stub (48) extending from the signal interconnect toward an edge (49) of the substrate; - An electrically conductive ground plane, which is parallel to the first side (23) and separated by an electrically non-conductive layer from the first side; and - a resistor (50) connecting the plating stub (48) to the ground plane, wherein the resistor (50) comprises a discrete resistor attached to the first side (23) of the substrate, the discrete resistor being a first Line electrically connected to the plating stub (48) and comprising a second line electrically connected to a ground via (46B), the ground via (46B) being electrically connected to the ground plane.
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