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Low-temperature polycrystalline silicon thin-film transistor based on dual-gate structure and manufacturing method therefor
Low-temperature polycrystalline silicon thin-film transistor based on dual-gate structure and manufacturing method therefor
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机译:基于双栅结构的低温多晶硅薄膜晶体管及其制造方法
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摘要
A low-temperature polycrystalline silicon thin-film transistor based on a dual-gate structure, and a method for manufacturing the low-temperature polycrystalline silicon thin-film transistor with the dual-gate structure. The low-temperature polycrystalline silicon thin-film transistor comprises a substrate (10); at least one patterned amorphous silicon layer (11) that is located in a barrier layer (20) on the substrate and forms a bottom gate; an N-type metal oxide semiconductor (81) located on the barrier layer (20); and a P-type metal oxide semiconductor (82) located on the barrier layer (20). A patterned gate electrode layer (17) formed by the N-type metal oxide semiconductor (81) and the bottom gate formed by the at least one patterned amorphous silicon layer (11) are combined to form a dual-gate structure, so that the current-voltage characteristic is more stable and the conducting current is obviously improved, the driving capacity is increased, the power consumption is reduced and the yield rate of products is improved.
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