METHOD FOR PREVENTING VERTICAL AND LATERAL INHOMOGENEITIES WHEN ETCHING THROUGH-SILICON VIAS

摘要

A method for producing a semiconductor device, comprising the steps of: providing a silicon wafer having a plurality of raised portions of equal height on a first surface of the silicon wafer as a placeholder for through-silicon vias; depositing an etch stop layer on the first surface of the silicon wafer; planarizing a surface of the etch stop layer; permanently bonding a first carrier wafer on the surface of the etch stop layer; producing components on or in a second surface of the silicon wafer in a front-end-of-line process; etching a plurality of trenches into the silicon wafer using a masked etching process, proceeding from the second surface of the silicon wafer, each trench being formed at the respective location of one raised portion of the plurality of raised portions; depositing side wall insulation layers made of insulating material on side walls of the trenches; forming through-silicon vias by filling the trenches with electrically conductive material; producing a conductor path stack in a back-end-of-line process for contacting the active components on the second surface of the silicon wafer; temporarily bonding a second carrier wafer onto a surface of the conductor path stack; removing the first carrier wafer and exposing the through-silicon vias by partially removing the etch stop layer.