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INSULATION RELIABILITY EVALUATION CIRCUIT, MANUFACTURING METHOD THEREOF, AND INSULATION RELIABILITY EVALUATION TEST METHOD

机译:绝缘可靠性评估电路,其制造方法以及绝缘可靠性评估测试方法

摘要

PROBLEM TO BE SOLVED: To provide an insulation reliability evaluation circuit capable of taking an insulation reliability test in an interlayer connection circuit part in a build-up structure of a printed wiring board even with a smaller insulation distance than before and capable of taking a highly accurate and highly reliable insulation evaluation test, a manufacturing method thereof, and an insulation reliability evaluation test method.;SOLUTION: An insulation reliability evaluation circuit includes a substrate 1, a first wiring 4 that can be electrically connected to a plus electrode of a power source and a second wiring 5 that can be electrically connected to a minus electrode of the power source, which are provided on the substrate 1, a first insulating layer 2 provided on the substrate 1, the first wiring 4, and the second wiring 5, a second insulating layer 3 provided on the first insulating layer 2, and a non-penetrating via 6 extending from the second insulating layer 3 to the first wiring 4 or the second wiring 5 through the first insulating layer 2.;SELECTED DRAWING: Figure 1;COPYRIGHT: (C)2019,JPO&INPIT
机译:解决的问题:提供一种绝缘可靠性评估电路,该绝缘可靠性评估电路即使在绝缘距离比以前更小的情况下,也能够在印刷线路板的层叠结构中的层间连接电路部分中进行绝缘可靠性测试,并且能够承受较高的成本。精度和高度可靠的绝缘评估测试,其制造方法以及绝缘可靠性评估测试方法。;解决方案:绝缘可靠性评估电路包括基板1,可与电源的正极连接的第一布线4设置在基板1,设置在基板1,设置在基板1上的第一绝缘层2,第一布线4,以及第二布线5的源极和可与电源的负电极电连接的第二布线5。第二绝缘层3设置在第一绝缘层2上,并且非穿透通孔6从第二绝缘层3延伸至第二绝缘层3。穿过第一绝缘层2的第一布线4或第二布线5 ;;选择的图纸:图1;版权:(C)2019,JPO&INPIT

著录项

  • 公开/公告号JP2018166185A

    专利类型

  • 公开/公告日2018-10-25

    原文格式PDF

  • 申请/专利权人 HITACHI CHEMICAL CO LTD;

    申请/专利号JP20170063715

  • 发明设计人 FUKUDA TOMIO;

    申请日2017-03-28

  • 分类号H05K1/11;H05K3/40;H05K3/46;

  • 国家 JP

  • 入库时间 2022-08-21 13:14:09

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