Yield process for analog circuit design optimization

摘要

A method for analog circuit design includes the steps of (A) simulating a plurality of initial designs of an analog circuit with a simulation that is based on random values and is executed in a computer to generate a plurality of respective yield values, (B) retaining the initial designs of the analog circuit where the respective yield value exceeds a threshold, (C) evaluating the retained designs of the analog circuit with an extreme value analysis to generate respective upper confidence intervals and respective lower confidence intervals of the retained designs, and (D) marking the retained designs as passed where a plurality of electrical specification values of the analog circuit fall below the respective lower confidence intervals. A final design of the analog circuit is based on the retained designs marked as passed.