A dual port static random access memory cell includes a write port portion and a read port portion. The write port further includes a WPU1 and a WPU2; a WPD1 and a WPD2; and a WPG1 and a WPG2. The WPU1, WPU2, WPD1 and WPD2 are configured to form two cross-coupled inverters for data storage, wherein the WPG1 and WPG2 are connected to the two cross-coupled inverters for writing. The read port portion further includes a read pull down device (RPD) and a read pass gate device (RPG) connected to the two cross-coupled inverters for reading. Each of the WPU1 and WPU2 includes a single FinFET. Each of the WPD1, WPD2, WPG1, WPG2, RPD and RPG includes multiple FinFETs. The WPD1, WPD2, WPG1 and WPG2 include a same number of FinFETs. The RPD includes a number of FinFETs greater than a number of FinFETs in the RPG.
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