CONTROLLER THAT RECEIVES A CYCLIC REDUNDANCY CHECK (CRC) CODE FROM AN ELECTRICALLY ERASABLE PROGRAMMABLE MEMORY DEVICE

摘要

A memory device includes a first interface that is to couple to a bidirectional link and a second interface to couple to a unidirectional link. An encoder generates first error-detection information corresponding to write data received via the bidirectional link for a write operation. An encoder generates second error-detection information corresponding to read data transmitted via the bidirectional link for a read operation. A transmitter coupled to the unidirectional link transmits the both the first and second error-detection information. A controller may receive the first and second error-detection information. Based on at least one of the first and second error-detection information, the controller may command the memory device to retry an operation.