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METHOD, AND A SYNCHRONOUS DIGITAL CIRCUIT, FOR PREVENTING PROPAGATION OF SET-UP TIMING DATA ERRORS
METHOD, AND A SYNCHRONOUS DIGITAL CIRCUIT, FOR PREVENTING PROPAGATION OF SET-UP TIMING DATA ERRORS
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机译:防止设置定时数据错误的传播的方法和同步数字电路
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摘要
There is disclosed a synchronous digital circuit having a system clock and for processing a data signal, wherein the digital circuit comprises a data path, a hard macro having a macro input, a logic circuit in the data path upstream of the macro input and having a first part and a second part, the second part being immediately upstream of the macro input, a set-up timing error detector having an input, wherein the input is on the data path between the first part and the second part, and a timing correction unit, wherein the data transit time across the second part is equal to or less than one half of a clock period, and wherein the timing correction unit is configured to correct, in response to the set-up timing error detector detecting a set-up timing error, the detected set-up timing error before the data reaches the macro input.
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