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Methods and apparatus for a configurable high-side NMOS gate control with improved gate to source voltage regulation
Methods and apparatus for a configurable high-side NMOS gate control with improved gate to source voltage regulation
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机译:用于具有改进的栅极到源极电压调节的可配置高端NMOS栅极控制的方法和设备
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摘要
In described examples, a transistor has: a source and a drain coupled between a supply voltage and an output terminal; and a gate terminal. A charge pump has: an output node coupled to the gate terminal; and a clock input. An oscillator is coupled to generate a clock signal. A clock enable circuit is coupled to: receive the clock signal; and selectively output the clock signal to the clock input, responsive to an enable signal. A comparator is coupled to output the enable signal in response to a comparison between a reference current and a current through a series resistor. The series resistor is coupled to the gate terminal.
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