For point-to-point interconnection with increase Test coverage from fault injection techniques

摘要

Various aspects describe on piece hardware error generation device assembly.In some cases, hardware error generation device assembly is connected to the data path between two components in identical chips.When fault seeding input is received, which generates device assembly and changes the data just transmitted on the data path by being inserted into the data pattern of simulation erroneous condition.Alternatively or cumulatively, which randomly changes one or more of transmitted data bit.