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SYSTEMS AND METHODS FOR CORRECTING DETERMINISTIC JITTER IN AN ALL-DIGITAL PHASE LOCKED LOOP
SYSTEMS AND METHODS FOR CORRECTING DETERMINISTIC JITTER IN AN ALL-DIGITAL PHASE LOCKED LOOP
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机译:用于校正全数字锁相环中确定性抖动的系统和方法
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摘要
A method for correcting deterministic jitter in an all-digital phase-locked loop (ADPLL) is described. The method includes determining an offset to an input frequency of the ADPLL that causes an oscillator tuning word (OTW) provided to a digitally-controlled oscillator (DCO) quantizer to fall between two DCO codes. The method also includes applying the offset to the input frequency of the ADPLL to force the DCO quantizer to have gain.
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