METHOD OF APPLYING VERTEX BASED CORRECTIONS TO A SEMICONDUCTOR DESIGN

摘要

The present invention discloses an improved shape correction method that is adapted to suitably transfer a semiconductor design onto a wafer or mask in a nanometer scale process. Unlike some prior art, shape correction and, if possible, dose correction are applied before fracture. Unlike edge-based correction, in which the edges are displaced in parallel, the displacement applied to the shape correction produced in accordance with the present invention does not preserve the parallelism of the edges, which is particularly suitable for free-form designs. The seed design is created in the target design. The vertices connecting the segments are arranged along the seed design contour. The correction site is placed in the segment. The displacement vector is applied to the vertex. A simulated contour is generated and compared to the contour of the target design. The process is repeated until a match criterion (or other break criterion) between the simulated design and the target design is reached.