METHOD OF APPLYING VERTEX BASED CORRECTIONS TO A SEMICONDUCTOR DESIGN

摘要

The present invention discloses an improved shape correction method applied to properly transfer a semiconductor design onto a wafer or mask in a nanometer scale process. Unlike some prior art, shape correction and possibly dose correction are applied before fracture. Unlike edge-based correction, in which the edges are displaced in parallel, the displacement applied to the shape correction produced according to the invention does not preserve the parallelism of the edge, which is particularly suitable for free-form design. The seed design is created in the target design. Vertices connecting the segments are placed along the seed design contour. A calibration site is placed on the segment. The displacement vector is applied to the vertex. The simulated contour is generated and compared with the contour of the target design. The process is repeated until a match criterion (or other stop criterion) between the simulated design and the target design is reached.