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A METHOD FOR EXECUTING BLOCKS OF INSTRUCTIONS USING A MICROPROCESSOR ARCHITECTURE HAVING A REGISTER VIEW SOURCE VIEW INSTRUCTION VIEW AND A PLURALITY OF REGISTER TEMPLATES
A METHOD FOR EXECUTING BLOCKS OF INSTRUCTIONS USING A MICROPROCESSOR ARCHITECTURE HAVING A REGISTER VIEW SOURCE VIEW INSTRUCTION VIEW AND A PLURALITY OF REGISTER TEMPLATES
A method of executing blocks of instructions using a microprocessor architecture with a register view, a source view, an instruction view, and a plurality of register templates is disclosed. The method includes receiving an incoming command sequence using a global front end; Grouping the instructions to form instruction blocks; Tracking instruction destinations and instruction source sources by populating the register template with block numbers corresponding to the instruction blocks using a plurality of register templates, the block numbers corresponding to the instruction blocks, Represent interdependencies between blocks; Using a register view data structure, the register view data structure storing destinations corresponding to the instruction blocks; Using a source view data structure, the source view data structure storing sources corresponding to the instruction blocks; And using an instruction view data structure, wherein the instruction view data structure stores instructions corresponding to the instruction blocks.
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