首页> 外国专利> 3D IC3DIC --SOCCOMPLETE SYSTEM-ON-CHIP SOC USING MONOLITHIC THREE DIMENSIONAL 3D INTEGRATED CIRCUIT IC 3DIC TECHNOLOGY

3D IC3DIC --SOCCOMPLETE SYSTEM-ON-CHIP SOC USING MONOLITHIC THREE DIMENSIONAL 3D INTEGRATED CIRCUIT IC 3DIC TECHNOLOGY

机译:3D IC3DIC-使用完整的三维3D集成电路IC 3DIC技术的完整芯片上系统

摘要

The embodiments disclosed in the detailed description include a complete system-on-a-chip (SOC) solution using monolithic three-dimensional (3D) integrated circuit (3D) integration technology. The present disclosure provides a method and system for implementing the method of the present invention in order to create a system on a chip that includes layers within a monolithic 3DIC and a possible subsequent short between tiers passing through monolithic intertier via (MIV) Includes examples of the ability to customize interconnection. In particular, different tiers of the 3DIC are configured to support different functions and adhere to different design criteria. Thus, 3DIC may have analog layers, layers with higher voltage thresholds, layers with lower leakage current, layers of different materials to implement components that require different base materials, and the like. Unlike stacked dies, the top layers can be the same size as the bottom layers, since no external wiring connections are required.
机译:详细描述中公开的实施例包括使用单片三维(3D)集成电路(3D)集成技术的完整的片上系统(SOC)解决方案。本公开提供了用于实现本发明的方法以便在芯片上创建系统的方法和系统,该系统包括单片3DIC内的层以及穿过单片层间通孔(MIV)的层之间的可能的后续短路。定制互连的能力。特别地,3DIC的不同层被配置为支持不同的功能并遵守不同的设计标准。因此,3DIC可以具有模拟层,具有较高电压阈值的层,具有较低泄漏电流的层,用于实现需要不同基础材料的组件的不同材料的层等。与堆叠管芯不同,顶层可以与底层具有相同的大小,因为不需要外部布线连接。

著录项

  • 公开/公告号KR101832330B1

    专利类型

  • 公开/公告日2018-02-26

    原文格式PDF

  • 申请/专利权人 퀄컴 인코포레이티드;

    申请/专利号KR20167003723

  • 发明设计人 두 양;

    申请日2014-07-14

  • 分类号H01L27/06;H01L21/77;H01L21/822;H01L23/48;

  • 国家 KR

  • 入库时间 2022-08-21 12:38:19

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