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Dynamic frequency control using coarse clock gating

机译:使用粗略时钟门控的动态频率控制

摘要

A method and apparatus for controlling the frequency of a clock signal using a clock-gating circuit is disclosed. In one embodiment, a root clock signal and an enable signal are provided to a clock-gating circuit. The clock-gating circuit is configured to provide an operational clock signal (based on the root clock signal) when the enable signal is asserted. The operational clock signal is inhibited when the enable signal is de-asserted. The frequency of the operational clock signal can be output at a reduced frequency (relative to the root clock signal) by asserting the enable signal for one of every N clock cycles. Furthermore, the frequency of the operational clock signal can be dynamically changed by changing the rate of asserting the enable signal relative to the root clock signal, without suspending operation of a functional unit receiving the operational clock signal.
机译:公开了一种使用时钟门控电路控制时钟信号的频率的方法和设备。在一个实施例中,将根时钟信号和使能信号提供给时钟门控电路。时钟门控电路被配置为在使能信号被断言时提供操作时钟信号(基于根时钟信号)。当使能信号无效时,工作时钟信号被禁止。通过每N个时钟周期之一声明使能信号,就可以以降低的频率(相对于根时钟信号)输出操作时钟信号的频率。此外,可以通过改变相对于根时钟信号的使能信号有效的速率来动态地改变操作时钟信号的频率,而无需中止接收操作时钟信号的功能单元的操作。

著录项

  • 公开/公告号EP2549354B1

    专利类型

  • 公开/公告日2019-09-25

    原文格式PDF

  • 申请/专利权人 APPLE INC.;

    申请/专利号EP20120176156

  • 发明设计人 WANG JAMES;LAW PATRICK Y.;

    申请日2012-07-12

  • 分类号G06F1/08;G06F1/32;H03K23/66;

  • 国家 EP

  • 入库时间 2022-08-21 12:31:55

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