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IMPROVED TRANSISTOR DESIGN FOR USE IN ADVANCED NANOMETER FLASH MEMORY DEVICE

机译:改进的晶体管设计,用于先进的纳米闪存器件

摘要

To provide an improved PMOS and NMOS transistor design technique of a sensing circuit for use in an advanced nanometer flash memory device.SOLUTION: In a decoder used for a memory device, a plurality of reception blocks 700 and 701 to 707 configured so as to receive from bit lines are each configured of two types of transistors having respectively different proximity effects and STI effects. Further, the two types of transistors are used in a sensing circuit in each of PMOS and NMOS transistors to improve performance of an analog circuit.SELECTED DRAWING: Figure 7
机译:为了提供用于高级纳米闪存设备的感测电路的改进的PMOS和NMOS晶体管设计技术,解决方案:在用于存储设备的解码器中,多个接收模块700和701至707配置为接收位线中的每个都由分别具有不同的邻近效应和STI效应的两种类型的晶体管构成。此外,在PMOS和NMOS晶体管中的每一个的感测电路中都使用了两种类型的晶体管,以提高模拟电路的性能。图7

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