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Efficient data path architecture for flash devices configured to perform multi-pass programming
Efficient data path architecture for flash devices configured to perform multi-pass programming
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机译:用于配置为执行多遍编程的闪存设备的高效数据路径架构
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摘要
Efficient data path architecture for flash devices requiring multi-pass programming utilizes an external memory as an intermediate buffer to store the encoded data used for a first pass programming of the flash device. The stored encoded data can be read from the external memory for subsequent passes programming instead of fetching the data from an on-chip memory, which stores the data received from a host system. Thus, the on-chip memory can be made available to speed up the next data transfer from the host system.
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