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Pre-test power-optimized bin reassignment following selective voltage binning

机译:选择性电压合并后的预测试电源优化的合并重新分配

摘要

Disclosed is a method wherein selective voltage binning and leakage power screening of integrated circuit (IC) chips are performed. Additionally, pre-test power-optimized bin reassignments are made on a chip-by-chip basis. Specifically, a leakage power measurement of an IC chip selected from a voltage bin can is compared to a bin-specific leakage power screen value of the next slower voltage bin. If the leakage power measurement is higher, the IC chip will be left in the voltage bin to which it is currently assigned. If the leakage power measurement is lower, the IC chip will be reassigned to that next slower voltage bin. These processes can be iteratively repeated until no slower voltage bins are available or the IC chip cannot be reassigned. IC chips can subsequently be tested according to testing parameters, including the minimum test voltages, associated with the voltage bins to which they are finally assigned.
机译:公开了一种方法,其中执行对集成电路(IC)芯片的选择性电压合并和泄漏功率筛选。此外,在逐芯片的基础上进行了预测试功耗优化的仓位重新分配。具体地,将从电压仓中选择的IC芯片的泄漏功率测量结果与下一个较慢的电压仓中的特定于桶的泄漏功率屏蔽值进行比较。如果泄漏功率测量值较高,则IC芯片将留在当前分配给它的电压仓中。如果泄漏功率测量值较低,则将IC芯片重新分配给下一个较慢的电压槽。这些过程可以迭代地重复进行,直到没有可用的较慢电压仓或无法重新分配IC芯片为止。随后可以根据测试参数对IC芯片进行测试,包括与最终分配给它们的电压仓相关的最小测试电压。

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