首页> 外国专利> Method for local isolation between transistors produced on an SOI substrate, in particular an FDSOI substrate, and corresponding integrated circuit

Method for local isolation between transistors produced on an SOI substrate, in particular an FDSOI substrate, and corresponding integrated circuit

机译:在SOI衬底,特别是FDSOI衬底上生产的晶体管与相应集成电路之间进行局部隔离的方法

摘要

An integrated circuit may include an SOI substrate having a buried insulating layer, and a semiconductor film above the buried insulating layer. The semiconductor film may have first patterns in a first zone defining gate regions of first MOS transistors and also first dummy gate regions. The first zone may include two domains having a space therebetween, and the space may be filled by at least one insulating material and be situated between two dummy gate regions above a region of the supporting substrate without any insulating trench.
机译:集成电路可包括具有掩埋绝缘层的SOI衬底,以及在掩埋绝缘层上方的半导体膜。半导体膜可以在限定第一MOS晶体管的栅极区域以及第一伪栅极区域的第一区域中具有第一图案。所述第一区域可以包括两个域,所述两个域之间具有间隔,并且所述间隔可以由至少一种绝缘材料填充并且可以位于所述支撑衬底的区域上方的两个虚设栅极区域之间,而没有任何绝缘沟槽。

著录项

  • 公开/公告号US10283588B2

    专利类型

  • 公开/公告日2019-05-07

    原文格式PDF

  • 申请/专利权人 STMICROELECTRONICS (CROLLES 2) SAS;

    申请/专利号US201715845930

  • 发明设计人 EMMANUEL PERRIN;

    申请日2017-12-18

  • 分类号H01L21/84;H01L27/12;H01L29/06;H01L29/66;H01L21/762;H01L21/8238;

  • 国家 US

  • 入库时间 2022-08-21 12:11:39

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