首页> 外国专利> Selective High-K Formation in Gate-Last Process

Selective High-K Formation in Gate-Last Process

机译:后栅极工艺中的选择性高K形成

摘要

A method includes removing a dummy gate stack to form an opening between gate spacers, selectively forming an inhibitor film on sidewalls of the gate spacers, with the sidewalls of the gate spacers facing the opening, and selectively forming a dielectric layer over a surface of a semiconductor region. The inhibitor film inhibits growth of the dielectric layer on the inhibitor film. The method further includes removing the inhibitor film, and forming a replacement gate electrode in a remaining portion of the opening.
机译:一种方法包括:去除伪栅极堆叠以在栅极间隔物之间​​形成开口;在栅极间隔物的侧壁面向开口的情况下,选择性地在栅极间隔物的侧壁上形成抑制膜;以及在栅极间隔物的表面上方选择性地形成电介质层。半导体区域。抑制剂膜抑制了抑制剂膜上的电介质层的生长。该方法还包括:去除抑制剂膜;以及在开口的其余部分中形成替换栅电极。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号